# Three-state logic buffer

Canonical URL: https://eloragrid.ai/symbols/logic-three-state-buffer
Publisher: Elora Grid
Updated: 2026-10-14
Lookup label: 3STATE
Drawing use: Schematic
Reference families: Manufacturer

A digital output stage that can drive logical states or enter its documented high-impedance state.

## What it represents

A digital output stage that can drive logical states or enter its documented high-impedance state.
On a schematic, identify the data input, output-enable polarity and shared-bus ownership and trace the output bus and disabled-state behaviour. Keep the component tag and signal/reference names consistent across the control drawing, terminal schedule and device documentation.
High impedance differs from driving logical zero; disabled outputs still have device-specific leakage and voltage limits.
Terminal letters describe electrical roles, not package pin numbers. Check the selected public datasheet for the actual pin assignment, polarity and any internally connected terminals before completing the drawing.

## How to read it

- Identify the data input, output-enable polarity and shared-bus ownership.
- Trace the output bus and disabled-state behaviour.

## Information to show or reference

- Label the data input, output-enable polarity and shared-bus ownership.
- Cross-reference the output bus and disabled-state behaviour.
- Add the selected device or circuit documentation revision, power/reference connections and project signal convention.

## Important distinction

High impedance differs from driving logical zero; disabled outputs still have device-specific leakage and voltage limits.

## Facts

- Common schematic mnemonic: 3STATE — descriptive only; project/device documentation defines reference designations.
- Terminal / interface focus: The data input, output-enable polarity and shared-bus ownership
- Artwork scope: Original educational component glyph; not a certified standard graphic or package pinout.

## Public references

- [SN74HC125 — three-state buffers](https://www.ti.com/lit/ds/symlink/sn74hc125.pdf) — Texas Instruments. Public primary manufacturer documentation establishes the component function or circuit/topology relationship. Preview geometry and drafting explanations are independently authored.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.