# ANSI cross-coupled NOR latch

Canonical URL: https://eloragrid.ai/symbols/ansi-cross-coupled-nor-latch
Publisher: Elora Grid
Updated: 2026-10-28
Lookup label: SR
Drawing use: Schematic
Reference families: IEEE / ANSI, Manufacturer

## Symbol convention

Convention: IEEE / ANSI
Form: Two NOR outlines with each output fed back to the other gate's input
Distinctive-shape form as used in IEEE/ANSI-style schematics and manufacturer data books. Independent educational drawing; exact standard geometry and compliance are not asserted. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Related representation: [Set-reset latch](https://eloragrid.ai/symbols/set-reset-latch)

Two NOR gates cross-coupled to form an SR latch with active-high set and reset inputs.

## In plain English

### What does ANSI cross-coupled NOR latch mean?

Two NOR gates with each output fed back to an input of the other form an SR latch with active-high inputs. A high on set drives Q high, a high on reset drives Q low, and both low holds the state. Both high forces both outputs low and is normally treated as invalid.

### A simple example

This form appears in educational schematics and in discrete logic designs where a spare quad NOR package provides a latch. It is the natural form when the set and reset signals are active-high commands.

### What the drawings help you do

Like the NAND form, it shows construction rather than a guaranteed power-up state. A defined start-up condition needs extra circuitry or a reset pulse.

### This particular reference

Two NOR gates cross-coupled to form an SR latch with active-high set and reset inputs. The cross-coupled NAND latch responds to active-low inputs.

### Terms

- Signal: Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic: A drawing showing function and connections rather than physical appearance.

Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

- [SN74HC02 — NOR gate logic](https://www.ti.com/lit/ds/symlink/sn74hc02.pdf)


## What it represents

Two NOR gates with each output fed back to an input of the other form an SR latch with active-high inputs. A high on set drives Q high, a high on reset drives Q low, and both low holds the state. Both high forces both outputs low and is normally treated as invalid.
This form appears in educational schematics and in discrete logic designs where a spare quad NOR package provides a latch. It is the natural form when the set and reset signals are active-high commands.
Like the NAND form, it shows construction rather than a guaranteed power-up state. A defined start-up condition needs extra circuitry or a reset pulse.

## How to read it

- Inputs are active high.
- Both inputs high gives both outputs low.

## Information to show or reference

- Draw feedback paths clearly.
- Identify which output is Q.
- Show the power-up reset arrangement if needed.

## Important distinction

The cross-coupled NAND latch responds to active-low inputs.

## Facts

- Input sense: Active high
- Invalid state: Both inputs high
- Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic

## Public references

- [SN74HC02 — NOR gate logic](https://www.ti.com/lit/ds/symlink/sn74hc02.pdf) — Texas Instruments. NOR gate documentation for the building block.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.