{"schemaVersion":1,"slug":"iec-even-parity-element","name":"IEC even-parity element","kind":"symbol","abbreviation":"2k","aliases":["even-number-active element","2k qualifier element","even parity gate"],"category":"logic-signals","drawingTypes":["Schematic"],"referenceFamilies":["IEC","Manufacturer"],"summary":"Element marked 2k whose output is active when an even number of its inputs are active.","description":["The 2k qualifier means the output is active when an even number of inputs, including none, are active. It is the multi-input generalisation of exclusive-NOR and is used in parity generation and checking for data words.","On communication or memory logic drawings the even-parity element may feed a parity bit or compare a received parity bit. The drawing should indicate how many inputs are grouped, often with an input-line grouping or a bus notation, because the function depends on the full set.","The element gives no information about word framing or when the parity result is sampled. Clocking and latching are separate elements."],"readingNotes":["Count all inputs, including any shown by bus notation.","Zero active inputs counts as even."],"drawingChecklist":["Use 2k rather than =1 or = for parity.","Group the input bus clearly.","Show where the result is latched or compared."],"distinction":"The 2k+1 element is its complement and gives odd parity.","facts":[{"label":"Qualifier","value":"2k (even number active)"},{"label":"Two-input equivalent","value":"Exclusive-NOR"},{"label":"Artwork scope","value":"Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic"}],"references":[{"sourceId":"s28-ti-ieee91-logic-symbols","relevance":"Defines the 2k qualifier."},{"sourceId":"pub-electronics-ti-ls280","relevance":"Manufacturer parity generator and checker documentation."}],"related":["iec-odd-parity-element","parity-generator-checker","iec-logic-identity-element"],"artwork":"s28-iec-even-parity-element","publishedOn":"2026-10-28","updatedOn":"2026-10-28","provenance":"independent-public-research","symbolVariant":{"convention":"IEC","form":"Rectangular element with the 2k general qualifier","reference":"Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier."},"plainEnglish":{"title":"What does IEC even-parity element mean?","introduction":"The 2k additional drawing mark means the output is active when an even number of inputs, including none, are active. It is the multi-input generalisation of exclusive-NOR and is used in parity generation and checking for data words.","example":"On communication or memory logic drawings the even-parity element may feed a parity bit or compare a received parity bit. The drawing should indicate how many inputs are grouped, often with an input-line grouping or a bus notation, because the function depends on the full set.","drawings":"The element gives no information about word framing or when the parity result is sampled. Clocking and latching are separate elements.","terms":[{"name":"Normally open / normally closed","meaning":"The contact state in the normal condition defined for the drawing."},{"name":"Signal","meaning":"Electrical information passed between devices, rather than necessarily the main power supply."},{"name":"Schematic","meaning":"A drawing showing function and connections rather than physical appearance."}],"diagram":"flow","steps":["Identify the device and form","Read the connections and state","Check the equipment reference"],"caption":"A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.","sources":[{"label":"Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)","url":"https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf"},{"label":"SN74LS280 — odd/even parity generation and checking","url":"https://www.ti.com/product/SN74LS280"}],"detail":"Element marked 2k whose output is active when an even number of its inputs are active. The 2k+1 element is its complement and gives odd parity.","profileId":"reviewed-symbol-20261028"},"url":"https://eloragrid.ai/symbols/iec-even-parity-element","illustration":{"url":"https://eloragrid.ai/tools/electrical-library/illustrations/iec-even-parity-element.svg","scope":"Original educational concept; not an official standard graphic or product footprint","license":"https://creativecommons.org/licenses/by/4.0/"},"sources":[{"id":"s28-ti-ieee91-logic-symbols","title":"Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)","publisher":"Texas Instruments","url":"https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf","type":"manufacturer","scope":"Public explanation of rectangular logic symbols, general qualifiers, input and output qualifiers, dependency notation, bistable elements and coders, consistent with IEC 617-12 work.","checkedOn":"2026-10-28","reuse":"link-only","relevance":"Defines the 2k qualifier."},{"id":"pub-electronics-ti-ls280","title":"SN74LS280 — odd/even parity generation and checking","publisher":"Texas Instruments","url":"https://www.ti.com/product/SN74LS280","type":"manufacturer","scope":"Public device-function and terminal documentation used as an example of odd/even parity generation and checking. Example part numbers are manufacturer identifiers, not IEC/IEEE symbol IDs. Device ratings, pin numbering and availability remain in the selected product documentation.","checkedOn":"2026-10-14","reuse":"link-only","relevance":"Manufacturer parity generator and checker documentation."}]}