{"schemaVersion":1,"slug":"iec-logic-output-negation","name":"IEC logic negation at output","kind":"symbol","abbreviation":"NEG-OUT","aliases":["output negation circle","negated output","output inversion circle"],"category":"logic-signals","drawingTypes":["Schematic"],"referenceFamilies":["IEC","Manufacturer"],"summary":"Circle on an output edge meaning the internal 1 state of the element produces an external 0.","description":["Output negation turns AND into NAND, OR into NOR and a buffer into an inverter. The circle sits where the output line meets the outline and states that the internal 1 state produces the external 0 state. As with input negation, a logic convention must be declared to relate this to voltage levels.","Drafters use output negation to avoid drawing separate inverters. When a negated output feeds a negated input on the next element, the two cancel, and reviewers often simplify the drawing by removing both.","The circle carries no information about output drive type or loading. Open-circuit or three-state behaviour needs its own qualifier inside the outline."],"readingNotes":["Look for double negations between elements that cancel.","Confirm the logic convention declared for the sheet."],"drawingChecklist":["Place the circle at the outline edge, not along the line.","Declare the logic convention.","Simplify cancelling negations where the hardware allows."],"distinction":"An active-low output triangle states the level directly and is the data-book alternative.","facts":[{"label":"Meaning","value":"Internal 1 produces external 0"},{"label":"Effect on & element","value":"Gives NAND"},{"label":"Artwork scope","value":"Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic"}],"references":[{"sourceId":"s28-ti-ieee91-logic-symbols","relevance":"Defines logic negation at an output."}],"related":["iec-logic-input-negation","iec-active-low-output-indicator","iec-nand-gate"],"artwork":"s28-iec-logic-output-negation","publishedOn":"2026-10-28","updatedOn":"2026-10-28","provenance":"independent-public-research","symbolVariant":{"convention":"IEC","form":"Small circle at the output edge of the outline","reference":"Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier."},"plainEnglish":{"title":"What does IEC logic negation at output mean?","introduction":"Output negation turns AND into NAND, OR into NOR and a buffer into an inverter. The circle sits where the output line meets the outline and states that the internal 1 state produces the external 0 state. As with input negation, a logic convention must be declared to relate this to voltage levels.","example":"Drafters use output negation to avoid drawing separate inverters. When a negated output feeds a negated input on the next element, the two cancel, and reviewers often simplify the drawing by removing both.","drawings":"The circle carries no information about output drive type or loading. Open-circuit or three-state behaviour needs its own additional drawing mark inside the outline.","terms":[{"name":"Normally open / normally closed","meaning":"The contact state in the normal condition defined for the drawing."},{"name":"Signal","meaning":"Electrical information passed between devices, rather than necessarily the main power supply."},{"name":"Rating","meaning":"A value stating the conditions for which equipment is specified."}],"diagram":"flow","steps":["Identify the device and form","Read the connections and state","Check the equipment reference"],"caption":"A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.","sources":[{"label":"Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)","url":"https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf"}],"detail":"Circle on an output edge meaning the internal 1 state of the element produces an external 0. An active-low output triangle states the level directly and is the data-book alternative.","profileId":"reviewed-symbol-20261028"},"url":"https://eloragrid.ai/symbols/iec-logic-output-negation","illustration":{"url":"https://eloragrid.ai/tools/electrical-library/illustrations/iec-logic-output-negation.svg","scope":"Original educational concept; not an official standard graphic or product footprint","license":"https://creativecommons.org/licenses/by/4.0/"},"sources":[{"id":"s28-ti-ieee91-logic-symbols","title":"Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)","publisher":"Texas Instruments","url":"https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf","type":"manufacturer","scope":"Public explanation of rectangular logic symbols, general qualifiers, input and output qualifiers, dependency notation, bistable elements and coders, consistent with IEC 617-12 work.","checkedOn":"2026-10-28","reuse":"link-only","relevance":"Defines logic negation at an output."}]}