# IEC logic negation at output

Canonical URL: https://eloragrid.ai/symbols/iec-logic-output-negation
Publisher: Elora Grid
Updated: 2026-10-28
Lookup label: NEG-OUT
Drawing use: Schematic
Reference families: IEC, Manufacturer

## Symbol convention

Convention: IEC
Form: Small circle at the output edge of the outline
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.

Circle on an output edge meaning the internal 1 state of the element produces an external 0.

## In plain English

### What does IEC logic negation at output mean?

Output negation turns AND into NAND, OR into NOR and a buffer into an inverter. The circle sits where the output line meets the outline and states that the internal 1 state produces the external 0 state. As with input negation, a logic convention must be declared to relate this to voltage levels.

### A simple example

Drafters use output negation to avoid drawing separate inverters. When a negated output feeds a negated input on the next element, the two cancel, and reviewers often simplify the drawing by removing both.

### What the drawings help you do

The circle carries no information about output drive type or loading. Open-circuit or three-state behaviour needs its own additional drawing mark inside the outline.

### This particular reference

Circle on an output edge meaning the internal 1 state of the element produces an external 0. An active-low output triangle states the level directly and is the data-book alternative.

### Terms

- Normally open / normally closed: The contact state in the normal condition defined for the drawing.
- Signal: Electrical information passed between devices, rather than necessarily the main power supply.
- Rating: A value stating the conditions for which equipment is specified.

Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf)


## What it represents

Output negation turns AND into NAND, OR into NOR and a buffer into an inverter. The circle sits where the output line meets the outline and states that the internal 1 state produces the external 0 state. As with input negation, a logic convention must be declared to relate this to voltage levels.
Drafters use output negation to avoid drawing separate inverters. When a negated output feeds a negated input on the next element, the two cancel, and reviewers often simplify the drawing by removing both.
The circle carries no information about output drive type or loading. Open-circuit or three-state behaviour needs its own qualifier inside the outline.

## How to read it

- Look for double negations between elements that cancel.
- Confirm the logic convention declared for the sheet.

## Information to show or reference

- Place the circle at the outline edge, not along the line.
- Declare the logic convention.
- Simplify cancelling negations where the hardware allows.

## Important distinction

An active-low output triangle states the level directly and is the data-book alternative.

## Facts

- Meaning: Internal 1 produces external 0
- Effect on & element: Gives NAND
- Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic

## Public references

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. Defines logic negation at an output.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.