# IEC NAND gate (rectangular form)

Canonical URL: https://eloragrid.ai/symbols/iec-nand-gate
Publisher: Elora Grid
Updated: 2026-10-28
Lookup label: &
Drawing use: Schematic
Reference families: IEC, Manufacturer

## Symbol convention

Convention: IEC
Form: & rectangular element with output negation circle
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Related representation: [NAND gate](https://eloragrid.ai/symbols/logic-nand-gate)

IEC AND box with a negation circle or polarity triangle at its output, giving the NAND function.

## In plain English

### What does IEC NAND gate (rectangular form) mean?

In the IEC rectangular system there is no separate NAND additional drawing mark. The element is an & box whose output carries a logic negation circle, or in data-book practice a polarity triangle marking the output as active-low. The output therefore stands at its external 0 state only when all inputs are active.

### A simple example

When reading device data books that use polarity indicators instead of circles, the triangle at the output means the internal 1 state produces a low level. A drawing should be consistent: mixing circles and triangles on the same sheet invites misreading because circles depend on the declared logic convention.

### What the drawings help you do

The symbol does not show output drive type. Open-collector, three-state or totem-pole outputs need their own additional drawing mark inside the outline next to the output line.

### This particular reference

IEC AND box with a negation circle or polarity triangle at its output, giving the NAND function. An & box with a negated input rather than a negated output is a different function (an inhibit-type AND), not a NAND.

### Terms

- Normally open / normally closed: The contact state in the normal condition defined for the drawing.
- Signal: Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic: A drawing showing function and connections rather than physical appearance.

Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf)
- [SN74HC00 — NAND gate logic](https://www.ti.com/lit/ds/symlink/sn74hc00.pdf)


## What it represents

In the IEC rectangular system there is no separate NAND qualifier. The element is an & box whose output carries a logic negation circle, or in data-book practice a polarity triangle marking the output as active-low. The output therefore stands at its external 0 state only when all inputs are active.
When reading device data books that use polarity indicators instead of circles, the triangle at the output means the internal 1 state produces a low level. A drawing should be consistent: mixing circles and triangles on the same sheet invites misreading because circles depend on the declared logic convention.
The symbol does not show output drive type. Open-collector, three-state or totem-pole outputs need their own qualifier inside the outline next to the output line.

## How to read it

- Look for the circle or triangle at the output edge; it is easy to miss on a reduced print.
- Confirm whether the sheet uses positive logic, negative logic or polarity indicators.

## Information to show or reference

- Draw the negation mark touching the outline at the output.
- State the logic convention in the sheet notes.
- Add an output-type qualifier where the output is not a standard push-pull stage.

## Important distinction

An & box with a negated input rather than a negated output is a different function (an inhibit-type AND), not a NAND.

## Facts

- Qualifier: & plus output negation
- Output active state: External 0 when all inputs active (positive logic)
- Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic

## Public references

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. Explains output negation and polarity indicator conventions.
- [SN74HC00 — NAND gate logic](https://www.ti.com/lit/ds/symlink/sn74hc00.pdf) — Texas Instruments. Manufacturer NAND gate documentation.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.