# IEC pulse-triggered (master-slave) JK flip-flop Canonical URL: https://eloragrid.ai/symbols/iec-pulse-triggered-jk-flip-flop Publisher: Elora Grid Updated: 2026-10-28 Lookup label: 1J 1K Drawing use: Schematic Reference families: IEC, Manufacturer ## Symbol convention Convention: IEC Form: JK bistable with static C1 and postponed-output marks Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. JK bistable whose outputs carry postponed marks: they change when the clock pulse ends, not at its start. ## In plain English ### What does IEC pulse-triggered (master-slave) JK flip-flop mean? A pulse-triggered or master-slave JK flip-flop is drawn with a static C1 input and postponed output marks at Q and its complement. The data must be set up before the clock pulse starts and held while C1 is active; the outputs change when C1 returns to its initial level. ### A simple example Older TTL designs and some relay-logic equivalents use this behaviour. When reviewing, the presence of the postponed mark tells you that J and K must not change during the clock pulse, a stricter rule than for edge-triggered devices. ### What the drawings help you do If the C1 input also carries a dynamic mark, the device is the data lock-out type, which samples on the edge but still postpones the output. ### This particular reference JK bistable whose outputs carry postponed marks: they change when the clock pulse ends, not at its start. The edge-triggered JK flip-flop has a dynamic C1 and no postponed marks. ### Terms - Coil: A wound conductor that can produce a magnetic field when energised. - Signal: Electrical information passed between devices, rather than necessarily the main power supply. - Schematic: A drawing showing function and connections rather than physical appearance. Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram. - [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) ## What it represents A pulse-triggered or master-slave JK flip-flop is drawn with a static C1 input and postponed output marks at Q and its complement. The data must be set up before the clock pulse starts and held while C1 is active; the outputs change when C1 returns to its initial level. Older TTL designs and some relay-logic equivalents use this behaviour. When reviewing, the presence of the postponed mark tells you that J and K must not change during the clock pulse, a stricter rule than for edge-triggered devices. If the C1 input also carries a dynamic mark, the device is the data lock-out type, which samples on the edge but still postpones the output. ## How to read it - Postponed marks at outputs indicate pulse triggering. - A dynamic C1 together with postponed outputs indicates data lock-out. ## Information to show or reference - Draw postponed marks next to both outputs. - Show C1 as static unless data lock-out is intended. - Note data stability requirements. ## Important distinction The edge-triggered JK flip-flop has a dynamic C1 and no postponed marks. ## Facts - Output timing: Changes at end of clock pulse - Data requirement: Stable for the whole active clock level - Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic ## Public references - [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. Pulse-triggered and data lock-out bistable explanations and postponed output qualifier. ## Graphic scope Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.