# IEC random-access memory (RAM)

Canonical URL: https://eloragrid.ai/symbols/iec-random-access-memory
Publisher: Elora Grid
Updated: 2026-10-28
Lookup label: RAM
Drawing use: Schematic
Reference families: IEC, Manufacturer

## Symbol convention

Convention: IEC
Form: Rectangular element with RAM qualifier, address grouping, write control and A-dependent data
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.

IEC element marked RAM with address grouping, a write control input and A-labelled data inputs and outputs.

## In plain English

### What does IEC random-access memory (RAM) mean?

A RAM symbol carries the RAM additional drawing mark and organisation. Address inputs form an A group; a write input is labelled with control dependency, and data inputs are labelled A plus the control number and D, meaning data is written to the addressed word when the control is active. Data outputs are labelled A.

### A simple example

TI's overview builds a 16-word by 4-bit memory from latches to explain this notation. On drawings, RAM symbols document buffers in communication modules and processor boards.

### What the drawings help you do

The symbol does not state whether the memory is static or dynamic, its retention behaviour, or any battery backup. Note those where data must survive power loss.

### This particular reference

IEC element marked RAM with address grouping, a write control input and A-labelled data inputs and outputs. ROM has no write inputs; FIFO memory has no address inputs.

### Terms

- Signal: Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic: A drawing showing function and connections rather than physical appearance.

Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf)


## What it represents

A RAM symbol carries the RAM qualifier and organisation. Address inputs form an A group; a write input is labelled with control dependency, and data inputs are labelled A plus the control number and D, meaning data is written to the addressed word when the control is active. Data outputs are labelled A.
TI's overview builds a 16-word by 4-bit memory from latches to explain this notation. On drawings, RAM symbols document buffers in communication modules and processor boards.
The symbol does not state whether the memory is static or dynamic, its retention behaviour, or any battery backup. Note those where data must survive power loss.

## How to read it

- Write control appears as a C input; data inputs carry A and the control number.
- Check for three-state outputs.

## Information to show or reference

- State the organisation.
- Show write and enable controls with dependency labels.
- Note retention or backup arrangements.

## Important distinction

ROM has no write inputs; FIFO memory has no address inputs.

## Facts

- Qualifier: RAM
- Write notation: A,mD inputs under Cm control
- Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic

## Public references

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. RAM qualifier and the memory array example using A dependency.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.