{"schemaVersion":1,"slug":"iec-sr-latch","name":"IEC SR latch (rectangular form)","kind":"symbol","abbreviation":"S R","aliases":["IEC set-reset bistable","rectangular RS latch","S/R element"],"category":"logic-signals","drawingTypes":["Schematic"],"referenceFamilies":["IEC","Manufacturer"],"summary":"Rectangular IEC bistable with S and R inputs that set or reset the stored state immediately.","description":["The simplest IEC bistable is a rectangle with inputs labelled S and R and outputs Q and complemented Q. An active S sets the element to 1 and an active R resets it to 0, with no clock involved. Negation or polarity marks show active-low inputs, as on devices built from cross-coupled NAND gates.","SR latches appear in alarm-latching and seal-in logic on control drawings. The key question for a reviewer is what happens when both S and R are active; dependency notation or a note should state whether set or reset dominates.","The symbol does not specify the power-up state. Where it matters, add the I=0 or I=1 qualifier or a note. A separate reset or initialisation circuit is needed when the system requires a defined starting condition."],"readingNotes":["Check for active-low marks on S and R.","Look for a stated set or reset priority."],"drawingChecklist":["Label S and R inside the outline.","State the priority when both are active.","Specify the power-up state where relevant."],"distinction":"A clocked SR flip-flop has 1S and 1R inputs under C1 control; the plain latch has none.","facts":[{"label":"Inputs","value":"S and R, unclocked"},{"label":"Ambiguity","value":"Both active needs a stated priority"},{"label":"Artwork scope","value":"Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic"}],"references":[{"sourceId":"s28-ti-ieee91-logic-symbols","relevance":"Usual meanings of S and R inputs and bistable symbols."},{"sourceId":"pub-electronics-ti-ls279","relevance":"SR latch device documentation."}],"related":["set-reset-latch","iec-set-reset-dependency","ansi-cross-coupled-nor-latch"],"artwork":"s28-iec-sr-latch","publishedOn":"2026-10-28","updatedOn":"2026-10-28","provenance":"independent-public-research","symbolVariant":{"convention":"IEC","form":"Rectangular bistable with S and R inputs","reference":"Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.","counterpart":"set-reset-latch"},"plainEnglish":{"title":"What does IEC SR latch (rectangular form) mean?","introduction":"The simplest IEC bistable is a rectangle with inputs labelled S and R and outputs Q and complemented Q. An active S sets the element to 1 and an active R resets it to 0, with no clock involved. Negation or polarity marks show active-low inputs, as on devices built from cross-coupled NAND gates.","example":"SR latches appear in alarm-latching and seal-in logic on control drawings. The key question for a reviewer is what happens when both S and R are active; dependency notation or a note should state whether set or reset dominates.","drawings":"The symbol does not specify the power-up state. Where it matters, add the I=0 or I=1 additional drawing mark or a note. A separate reset or initialisation circuit is needed when the system requires a defined starting condition.","terms":[{"name":"Normally open / normally closed","meaning":"The contact state in the normal condition defined for the drawing."},{"name":"Signal","meaning":"Electrical information passed between devices, rather than necessarily the main power supply."},{"name":"Schematic","meaning":"A drawing showing function and connections rather than physical appearance."}],"diagram":"flow","steps":["Identify the device and form","Read the connections and state","Check the equipment reference"],"caption":"A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.","sources":[{"label":"Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)","url":"https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf"},{"label":"SN74LS279A — set-reset latches","url":"https://www.ti.com/product/SN74LS279A"}],"detail":"Rectangular IEC bistable with S and R inputs that set or reset the stored state immediately. A clocked SR flip-flop has 1S and 1R inputs under C1 control; the plain latch has none.","profileId":"reviewed-symbol-20261028"},"url":"https://eloragrid.ai/symbols/iec-sr-latch","illustration":{"url":"https://eloragrid.ai/tools/electrical-library/illustrations/iec-sr-latch.svg","scope":"Original educational concept; not an official standard graphic or product footprint","license":"https://creativecommons.org/licenses/by/4.0/"},"sources":[{"id":"s28-ti-ieee91-logic-symbols","title":"Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)","publisher":"Texas Instruments","url":"https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf","type":"manufacturer","scope":"Public explanation of rectangular logic symbols, general qualifiers, input and output qualifiers, dependency notation, bistable elements and coders, consistent with IEC 617-12 work.","checkedOn":"2026-10-28","reuse":"link-only","relevance":"Usual meanings of S and R inputs and bistable symbols."},{"id":"pub-electronics-ti-ls279","title":"SN74LS279A — set-reset latches","publisher":"Texas Instruments","url":"https://www.ti.com/product/SN74LS279A","type":"manufacturer","scope":"Public device-function and terminal documentation used as an example of set-reset latches. Example part numbers are manufacturer identifiers, not IEC/IEEE symbol IDs. Device ratings, pin numbering and availability remain in the selected product documentation.","checkedOn":"2026-10-14","reuse":"link-only","relevance":"SR latch device documentation."}]}