# IEC SR latch (rectangular form)

Canonical URL: https://eloragrid.ai/symbols/iec-sr-latch
Publisher: Elora Grid
Updated: 2026-10-28
Lookup label: S R
Drawing use: Schematic
Reference families: IEC, Manufacturer

## Symbol convention

Convention: IEC
Form: Rectangular bistable with S and R inputs
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Related representation: [Set-reset latch](https://eloragrid.ai/symbols/set-reset-latch)

Rectangular IEC bistable with S and R inputs that set or reset the stored state immediately.

## In plain English

### What does IEC SR latch (rectangular form) mean?

The simplest IEC bistable is a rectangle with inputs labelled S and R and outputs Q and complemented Q. An active S sets the element to 1 and an active R resets it to 0, with no clock involved. Negation or polarity marks show active-low inputs, as on devices built from cross-coupled NAND gates.

### A simple example

SR latches appear in alarm-latching and seal-in logic on control drawings. The key question for a reviewer is what happens when both S and R are active; dependency notation or a note should state whether set or reset dominates.

### What the drawings help you do

The symbol does not specify the power-up state. Where it matters, add the I=0 or I=1 additional drawing mark or a note. A separate reset or initialisation circuit is needed when the system requires a defined starting condition.

### This particular reference

Rectangular IEC bistable with S and R inputs that set or reset the stored state immediately. A clocked SR flip-flop has 1S and 1R inputs under C1 control; the plain latch has none.

### Terms

- Normally open / normally closed: The contact state in the normal condition defined for the drawing.
- Signal: Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic: A drawing showing function and connections rather than physical appearance.

Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf)
- [SN74LS279A — set-reset latches](https://www.ti.com/product/SN74LS279A)


## What it represents

The simplest IEC bistable is a rectangle with inputs labelled S and R and outputs Q and complemented Q. An active S sets the element to 1 and an active R resets it to 0, with no clock involved. Negation or polarity marks show active-low inputs, as on devices built from cross-coupled NAND gates.
SR latches appear in alarm-latching and seal-in logic on control drawings. The key question for a reviewer is what happens when both S and R are active; dependency notation or a note should state whether set or reset dominates.
The symbol does not specify the power-up state. Where it matters, add the I=0 or I=1 qualifier or a note. A separate reset or initialisation circuit is needed when the system requires a defined starting condition.

## How to read it

- Check for active-low marks on S and R.
- Look for a stated set or reset priority.

## Information to show or reference

- Label S and R inside the outline.
- State the priority when both are active.
- Specify the power-up state where relevant.

## Important distinction

A clocked SR flip-flop has 1S and 1R inputs under C1 control; the plain latch has none.

## Facts

- Inputs: S and R, unclocked
- Ambiguity: Both active needs a stated priority
- Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic

## Public references

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. Usual meanings of S and R inputs and bistable symbols.
- [SN74LS279A — set-reset latches](https://www.ti.com/product/SN74LS279A) — Texas Instruments. SR latch device documentation.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.