# IEC subtracter (P-Q) Canonical URL: https://eloragrid.ai/symbols/iec-subtracter Publisher: Elora Grid Updated: 2026-10-28 Lookup label: P-Q Drawing use: Schematic Reference families: IEC, Manufacturer ## Symbol convention Convention: IEC Form: Rectangular element with the P-Q qualifier Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. IEC arithmetic element marked P-Q that subtracts word Q from word P, with borrow handling. ## In plain English ### What does IEC subtracter (P-Q) mean? The subtracter additional drawing mark is written P minus Q. Inputs are grouped as the P and Q words with binary weights and outputs give the difference, with borrow input and output terminals for cascading. TI's overview lists it with the adder and other arithmetic qualifiers. ### A simple example Dedicated subtracter devices are uncommon; the function is often provided by an adder with an inverted input word or by an arithmetic logic unit. Functional diagrams and programmable logic documentation still use the P-Q element to state intent clearly. ### What the drawings help you do The symbol does not say whether the result is signed or how negative results are represented. State that in the logic description. ### This particular reference IEC arithmetic element marked P-Q that subtracts word Q from word P, with borrow handling. The Σ adder adds P and Q; an ALU may perform either under mode control. ### Terms - Terminal: An identified point where a conductor connects. - Signal: Electrical information passed between devices, rather than necessarily the main power supply. - Schematic: A drawing showing function and connections rather than physical appearance. Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram. - [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) ## What it represents The subtracter qualifier is written P minus Q. Inputs are grouped as the P and Q words with binary weights and outputs give the difference, with borrow input and output terminals for cascading. TI's overview lists it with the adder and other arithmetic qualifiers. Dedicated subtracter devices are uncommon; the function is often provided by an adder with an inverted input word or by an arithmetic logic unit. Functional diagrams and programmable logic documentation still use the P-Q element to state intent clearly. The symbol does not say whether the result is signed or how negative results are represented. State that in the logic description. ## How to read it - P is the minuend and Q the subtrahend. - Check borrow terminals when cascading. ## Information to show or reference - Mark the element P-Q. - Group and weight both words. - Describe the result representation. ## Important distinction The Σ adder adds P and Q; an ALU may perform either under mode control. ## Facts - Qualifier: P-Q - Common implementation: Adder with complemented input or ALU - Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic ## Public references - [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. Lists P-Q as the subtracter qualifier. ## Graphic scope Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.