# IEC three-state buffer (rectangular form)

Canonical URL: https://eloragrid.ai/symbols/iec-three-state-buffer
Publisher: Elora Grid
Updated: 2026-10-28
Lookup label: EN
Drawing use: Schematic
Reference families: IEC, Manufacturer

## Symbol convention

Convention: IEC
Form: 1 element with EN input and inverted-triangle three-state output qualifier
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Related representation: [Three-state logic buffer](https://eloragrid.ai/symbols/logic-three-state-buffer)

IEC buffer whose output carries the three-state triangle and is controlled by an EN input.

## In plain English

### What does IEC three-state buffer (rectangular form) mean?

The three-state buffer is drawn as a 1 element with a small downward triangle inside the outline next to the output, and an EN input. When EN is at its internal 1 state the output follows the input; at its internal 0 state the output goes to its external high-impedance state while the internal logic state is retained.

### A simple example

These elements appear where several drivers share a bus, such as data lines between controller cards. The drawing should make clear which signal drives each EN input and how the design prevents two drivers being enabled together, since the symbol itself does not show arbitration.

### What the drawings help you do

A negated EN input means the enable is active low, which is how many devices are supplied. Read the input marking carefully; reversing the enable sense would put a buffer on the bus at the wrong time.

### This particular reference

IEC buffer whose output carries the three-state triangle and is controlled by an EN input. An open-circuit output uses a diamond additional drawing mark and has no high-impedance logic state of its own; the three-state triangle is different.

### Terms

- Signal: Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic: A drawing showing function and connections rather than physical appearance.

Concept diagram: Identify the device and form → Read the connections and state → Check the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf)
- [SN74HC125 — three-state buffers](https://www.ti.com/lit/ds/symlink/sn74hc125.pdf)


## What it represents

The three-state buffer is drawn as a 1 element with a small downward triangle inside the outline next to the output, and an EN input. When EN is at its internal 1 state the output follows the input; at its internal 0 state the output goes to its external high-impedance state while the internal logic state is retained.
These elements appear where several drivers share a bus, such as data lines between controller cards. The drawing should make clear which signal drives each EN input and how the design prevents two drivers being enabled together, since the symbol itself does not show arbitration.
A negated EN input means the enable is active low, which is how many devices are supplied. Read the input marking carefully; reversing the enable sense would put a buffer on the bus at the wrong time.

## How to read it

- Find the EN input and check its polarity.
- Identify all other drivers on the same bus.

## Information to show or reference

- Place the three-state triangle next to the output.
- Label the EN input and its source.
- Show bus contention protection or a note on enable sequencing.

## Important distinction

An open-circuit output uses a diamond qualifier and has no high-impedance logic state of its own; the three-state triangle is different.

## Facts

- Output qualifier: Downward triangle (three-state)
- EN at internal 0: Output at external high impedance
- Artwork scope: Original educational illustration; consult the applicable standard and the selected device documentation for the exact graphic

## Public references

- [Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)](https://www.ti.com/lit/ml/sdyz001a/sdyz001a.pdf) — Texas Instruments. Explains the three-state qualifier and EN input effects.
- [SN74HC125 — three-state buffers](https://www.ti.com/lit/ds/symlink/sn74hc125.pdf) — Texas Instruments. Manufacturer three-state buffer documentation.

## Graphic scope

Independent original educational concept illustration by Elora Grid. Not a certified standards graphic or manufacturer footprint. Unitless; not to scale. Original artwork licence: https://creativecommons.org/licenses/by/4.0/. Publisher material is linked only.