OR
OR gate
A positive-logic element whose output is true when at least one input is true.
Schematic
IEEE / ANSI · OR3
ANSI three-input OR gate
Curved-back OR outline with three inputs; any one high input drives the output high.
In plain English
What does ANSI three-input OR gate mean?
The three-input OR uses the shield-shaped outline with a concave back and a pointed front, with a third input added on the curved back edge. Any input at logic 1 produces a logic 1 output. Triple three-input OR packages exist for this function.
A simple example
Typical uses include combining several fault or request signals into a single command. The inputs should be identified by signal name so that a test engineer can trace which source produced the output when the logic operates.
What the drawings help you do
The outline does not tell the reader whether inputs are filtered or latched. Any such behaviour must appear as separate elements before or after the gate.
This particular reference
Curved-back OR outline with three inputs; any one high input drives the output high. An exclusive-OR has an extra curved line behind the back; a plain OR has a single back curve.
- Signal
- Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic
- A drawing showing function and connections rather than physical appearance.
Read the source: CDx4HC4075 triple 3-input OR gates
IEEE / ANSI · Curved-back OR outline with three inputs
Distinctive-shape form as used in IEEE/ANSI-style schematics and manufacturer data books. Independent educational drawing; exact standard geometry and compliance are not asserted. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
Schematic · OR3
What it represents
The three-input OR uses the shield-shaped outline with a concave back and a pointed front, with a third input added on the curved back edge. Any input at logic 1 produces a logic 1 output. Triple three-input OR packages exist for this function.
Typical uses include combining several fault or request signals into a single command. The inputs should be identified by signal name so that a test engineer can trace which source produced the output when the logic operates.
The outline does not tell the reader whether inputs are filtered or latched. Any such behaviour must appear as separate elements before or after the gate.
How to read it
- Inputs meet the curved back, not a straight edge.
- Trace each input to its source tag.
Information to show or reference
- Terminate input leads on the concave back.
- Label each input signal.
- Show unused-input tie-offs for multi-input parts.
A distinction that matters
An exclusive-OR has an extra curved line behind the back; a plain OR has a single back curve.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
CDx4HC4075 triple 3-input OR gates
Manufacturer documentation for triple three-input OR gates.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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