IEC · Σ

IEC summing amplifier element (Σ)

Analogue element with Σ and several inputs, producing an output proportional to the weighted sum of the inputs.

In plain English

What does IEC summing amplifier element (Σ) mean?

A summing amplifier adds several analogue inputs, each with its own weighting. In IEC-style analogue element diagrams it is drawn as a rectangle with an amplifier mark and the Σ function, with weighting factors written next to each input. The usual circuit realisation is an inverting op-amp with one input resistor per signal.

A simple example

Summers appear in control loops for combining set-point and feedforward signals, in audio-style mixing of measurements, and in analogue computation. The weighting factors and the sign of the output must be stated because an inverting realisation reverses polarity.

Identify the device and formRead the connections and stateCheck the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

What the drawings help you do

The element does not show the resistor network that sets the weights. For a construction schematic, the op-amp circuit with values should be drawn or referenced.

This particular reference

Analogue element with Σ and several inputs, producing an output proportional to the weighted sum of the inputs. The digital Σ adder adds binary words; the analogue summing element adds voltages or currents.

Signal
Electrical information passed between devices, rather than necessarily the main power supply.
Schematic
A drawing showing function and connections rather than physical appearance.

Read the source: IEC graphical symbols for diagrams · University tutorials: amplifier configurations and signal processing

IEC · Rectangular analogue element with Σ function and several weighted inputs

IEC-style rectangular analogue element presentation; the IEC graphical symbols programme is cited for context only. Independent educational drawing; not certified IEC geometry or an IEC database identifier.

Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.

Schematic · ΣIEC summing amplifier element (Σ): original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

A summing amplifier adds several analogue inputs, each with its own weighting. In IEC-style analogue element diagrams it is drawn as a rectangle with an amplifier mark and the Σ function, with weighting factors written next to each input. The usual circuit realisation is an inverting op-amp with one input resistor per signal.

Summers appear in control loops for combining set-point and feedforward signals, in audio-style mixing of measurements, and in analogue computation. The weighting factors and the sign of the output must be stated because an inverting realisation reverses polarity.

The element does not show the resistor network that sets the weights. For a construction schematic, the op-amp circuit with values should be drawn or referenced.

How to read it

  • Weighting factors are written beside the inputs.
  • An inverting realisation gives a negative sum unless followed by an inverter.

Information to show or reference

  • State each input weight.
  • State output sign.
  • Reference the implementing op-amp circuit.

A distinction that matters

The digital Σ adder adds binary words; the analogue summing element adds voltages or currents.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

IEC graphical symbols for diagrams

IEC graphical symbols programme covering analogue elements; no geometry reproduced.

IEC · Public reference checked 13 October 2026 · Link only

University tutorials: amplifier configurations and signal processing

Public tutorial material on op-amp configurations including summing circuits.

Analog Devices · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 28 October 2026

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