Side-by-side reference

Understand the difference.

Compare the meaning, drawing context and source references of two entries. A similar graphic or shared abbreviation does not establish equivalence.

1J 1KIEC JK flip-flop (rectangular form): original educational illustration
IEC

IEC JK flip-flop (rectangular form)

The IEC JK flip-flop has inputs labelled 1J and 1K, both controlled by C1. On the active clock transition J=1, K=0 sets; J=0, K=1 resets; J=K=1 toggles; and J=K=0 holds. A negation mark outside the C1 input with the wedge indicates a falling-edge device.

Drawing use
Schematic
Application
Logic & signals
Reference family
IEC / Manufacturer
Form evidence
Rectangular bistable with 1J, 1K and dynamic C1 inputs. Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.

A distinction that matters

An IEC T flip-flop has a single 1T input; a JK with J and K tied high behaves the same way.

Full reference
JK-FFNegative-edge JK flip-flop: original educational illustration
Symbols

Negative-edge JK flip-flop

Updates or toggles its stored state from J and K inputs at the selected negative clock edge.

Drawing use
Schematic
Application
Logic & signals
Reference family
Manufacturer

A distinction that matters

JK input combinations define hold, set, reset or toggle behaviour; the clock-edge indication must match the selected device.

Full reference

Original educational previews. Follow the source references on each full entry for the appropriate standard or selected product.

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