IEC · Gm

IEC AND dependency (G)

Dependency label Gm: inputs or outputs carrying the number m are ANDed with the affecting G input.

In plain English

What does IEC AND dependency (G) mean?

In dependency notation, an input labelled G followed by a number is an affecting input. Every input or output labelled with the same number is ANDed with it. When the G input is at its internal 1 state the affected signals act normally; at its internal 0 state they are forced to 0. A bar over the number means the complement of the G input affects them.

A simple example

G dependency lets a device symbol show gating relationships without drawing extra AND gates. It is common on multiplexers, gated clocks and register symbols in device data books, and a drafter copying such a symbol must keep the numbers intact or the meaning changes.

Identify the device and formRead the connections and stateCheck the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

What the drawings help you do

The label describes logic only. It does not tell you whether the gating causes glitches on a clock line or what setup time applies between G and the affected input.

This particular reference

Dependency label Gm: inputs or outputs carrying the number m are ANDed with the affecting G input. V (OR) dependency imposes a 1 state when the affecting input is 1; G imposes a 0 state when the affecting input is 0.

Signal
Electrical information passed between devices, rather than necessarily the main power supply.
Schematic
A drawing showing function and connections rather than physical appearance.

Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)

IEC · Affecting input labelled Gm with affected inputs or outputs labelled m

Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.

Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.

Schematic · GmIEC AND dependency (G): original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

In dependency notation, an input labelled G followed by a number is an affecting input. Every input or output labelled with the same number is ANDed with it. When the G input is at its internal 1 state the affected signals act normally; at its internal 0 state they are forced to 0. A bar over the number means the complement of the G input affects them.

G dependency lets a device symbol show gating relationships without drawing extra AND gates. It is common on multiplexers, gated clocks and register symbols in device data books, and a drafter copying such a symbol must keep the numbers intact or the meaning changes.

The label describes logic only. It does not tell you whether the gating causes glitches on a clock line or what setup time applies between G and the affected input.

How to read it

  • Match each G number to every input or output carrying that number.
  • A bar over the affected number means the complement of G applies.

Information to show or reference

  • Keep G numbers unique within a symbol.
  • Label every affected terminal with the matching number.
  • Avoid mixing G numbers with other dependency letters using the same number.

A distinction that matters

V (OR) dependency imposes a 1 state when the affecting input is 1; G imposes a 0 state when the affecting input is 0.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)

Section on G (AND) dependency and summary table of dependency notation.

Texas Instruments · Public reference checked 28 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 28 October 2026

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