Transparent D latch
Follows the input data while its latch-enable condition is active and retains it when that condition ends.
IEC bistable with a static C1 control and 1D input; the output follows D while C1 is active.
In plain English
The transparent latch is drawn like the D flip-flop but the C1 input has no dynamic wedge. While C1 is at its internal 1 state, the output follows the 1D input; when C1 returns to 0 the last value is held. TI's overview describes this as a level-operated control input.
Latches are used to capture data from a bus or to hold a value for a display or relay driver. In octal devices the common-control block carries C1 and the output enable, with eight per-bit elements below.
Because the output follows the input during the active level, glitches on D during that time pass through. The symbol shows this behaviour only through the absence of the wedge, so check it carefully.
IEC bistable with a static C1 control and 1D input; the output follows D while C1 is active. The IEC D flip-flop has a dynamic wedge on C1 and captures only at the edge.
Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A) · SN74HC373 — transparent D latches
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
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The transparent latch is drawn like the D flip-flop but the C1 input has no dynamic wedge. While C1 is at its internal 1 state, the output follows the 1D input; when C1 returns to 0 the last value is held. TI's overview describes this as a level-operated control input.
Latches are used to capture data from a bus or to hold a value for a display or relay driver. In octal devices the common-control block carries C1 and the output enable, with eight per-bit elements below.
Because the output follows the input during the active level, glitches on D during that time pass through. The symbol shows this behaviour only through the absence of the wedge, so check it carefully.
The IEC D flip-flop has a dynamic wedge on C1 and captures only at the edge.
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
Transparent latch behaviour with level-operated control input.
Transparent latch documentation.
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