IEC · ⊓

IEC retriggerable monostable

IEC monostable showing only the single-pulse qualifier; each new trigger restarts the output pulse.

In plain English

What does IEC retriggerable monostable mean?

The retriggerable monostable is marked with the single pulse shape without the preceding 1. Each trigger during the output pulse restarts the timing, so the output remains active as long as triggers arrive more often than the set period.

A simple example

This behaviour is useful for missing-pulse detection and activity monitoring, where the output drops only when a regular signal stops. The drawing should note the expected trigger rate and the timeout chosen.

Identify the device and formRead the connections and stateCheck the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

What the drawings help you do

The symbol does not show whether a clear input truncates the pulse. Check for an R input and its polarity. Include reset behaviour in the timing chart so a missing-pulse indication can be distinguished from an externally forced clear.

This particular reference

IEC monostable showing only the single-pulse additional drawing mark; each new trigger restarts the output pulse. The non-retriggerable form has the 1 additional drawing mark and ignores triggers during the pulse.

Signal
Electrical information passed between devices, rather than necessarily the main power supply.
Schematic
A drawing showing function and connections rather than physical appearance.

Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A) · CD74HC123 — retriggerable monostables

IEC · Rectangular element with the single-pulse qualifier only

Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.

Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.

Schematic · ⊓IEC retriggerable monostable: original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

The retriggerable monostable is marked with the single pulse shape without the preceding 1. Each trigger during the output pulse restarts the timing, so the output remains active as long as triggers arrive more often than the set period.

This behaviour is useful for missing-pulse detection and activity monitoring, where the output drops only when a regular signal stops. The drawing should note the expected trigger rate and the timeout chosen.

The symbol does not show whether a clear input truncates the pulse. Check for an R input and its polarity. Include reset behaviour in the timing chart so a missing-pulse indication can be distinguished from an externally forced clear.

How to read it

  • Each trigger restarts the pulse.
  • Look for a clear or reset input.

Information to show or reference

  • Show the single-pulse qualifier without the 1.
  • Draw timing components and state the timeout.
  • State the expected trigger rate.

A distinction that matters

The non-retriggerable form has the 1 qualifier and ignores triggers during the pulse.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)

Lists the retriggerable monostable general qualifier.

Texas Instruments · Public reference checked 28 October 2026 · Link only

CD74HC123 — retriggerable monostables

Retriggerable monostable device documentation.

Texas Instruments · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 28 October 2026

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