Side-by-side reference

Understand the difference.

Compare the meaning, drawing context and source references of two entries. A similar graphic or shared abbreviation does not establish equivalence.

INHANSI inhibit gate (AND with one negated input): original educational illustration
IEEE / ANSI

ANSI inhibit gate (AND with one negated input)

An inhibit gate passes one signal only while a second, inhibiting signal is inactive. In distinctive-shape form it is drawn as an AND outline with a bubble on the inhibiting input. It is a very common pattern in interlock logic, where a command is allowed unless a blocking condition is present.

Drawing use
Schematic
Application
Logic & signals
Reference family
IEEE / ANSI / Manufacturer
Form evidence
AND outline with a bubble on one input. Distinctive-shape form as used in IEEE/ANSI-style schematics and manufacturer data books. Independent educational drawing; exact standard geometry and compliance are not asserted.

A distinction that matters

A NAND has its bubble at the output; an inhibit gate has its bubble on one input only.

Full reference
ANDAND gate: original educational illustration
Symbols

AND gate

A logic element whose output is true when all stated positive-logic inputs are true.

Drawing use
Schematic
Application
Logic & signals
Reference family
Manufacturer

A distinction that matters

An AND gate combines logical conditions; it does not specify relay-contact current capacity or a safety integrity level.

Full reference

Original educational previews. Follow the source references on each full entry for the appropriate standard or selected product.

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