Side-by-side reference

Understand the difference.

Compare the meaning, drawing context and source references of two entries. A similar graphic or shared abbreviation does not establish equivalence.

OEANSI three-state inverter with active-low enable: original educational illustration
IEEE / ANSI

ANSI three-state inverter with active-low enable

The three-state inverter is a triangle with an output bubble and a control lead entering the sloping side. A bubble on the control lead means output enable is active low, which is the arrangement on many octal line drivers. When disabled, the output is high impedance.

Drawing use
Schematic
Application
Logic & signals
Reference family
IEEE / ANSI / Manufacturer
Form evidence
Inverter triangle with bubble and enable lead with bubble on the triangle side. Distinctive-shape form as used in IEEE/ANSI-style schematics and manufacturer data books. Independent educational drawing; exact standard geometry and compliance are not asserted.

A distinction that matters

The non-inverting three-state buffer has no output bubble.

Full reference
3STATEThree-state logic buffer: original educational illustration
Symbols

Three-state logic buffer

A digital output stage that can drive logical states or enter its documented high-impedance state.

Drawing use
Schematic
Application
Logic & signals
Reference family
Manufacturer

A distinction that matters

High impedance differs from driving logical zero; disabled outputs still have device-specific leakage and voltage limits.

Full reference

Original educational previews. Follow the source references on each full entry for the appropriate standard or selected product.

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