IEEE / ANSI · AND3

ANSI three-input AND gate

D-shaped AND outline with three input leads; the output is high only when all three inputs are high.

In plain English

What does ANSI three-input AND gate mean?

The three-input AND keeps the familiar flat-backed D outline and simply adds a third input lead on the flat side. All three inputs must be at logic 1 in positive logic for the output to be at logic 1. Packages such as triple three-input AND devices provide this function directly.

A simple example

Drafters use the wider gate rather than cascading two-input gates when the function is a single permissive with three conditions, such as guard closed, pressure healthy and mode selected. A single symbol keeps the logic readable and avoids implying an intermediate signal that does not exist.

Identify the device and formRead the connections and stateCheck the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

What the drawings help you do

The outline does not show whether an unused input is tied high when a three-input part is used for two signals. Unused inputs on the physical device need a defined level shown on the schematic.

This particular reference

D-shaped AND outline with three input leads; the output is high only when all three inputs are high. A two-input AND followed by another AND produces the same logic but implies an intermediate net.

Signal
Electrical information passed between devices, rather than necessarily the main power supply.
Schematic
A drawing showing function and connections rather than physical appearance.

Read the source: SNx4HC11 triple 3-input AND gates

IEEE / ANSI · D-shaped AND outline with three inputs

Distinctive-shape form as used in IEEE/ANSI-style schematics and manufacturer data books. Independent educational drawing; exact standard geometry and compliance are not asserted. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.

Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.

Schematic · AND3ANSI three-input AND gate: original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

The three-input AND keeps the familiar flat-backed D outline and simply adds a third input lead on the flat side. All three inputs must be at logic 1 in positive logic for the output to be at logic 1. Packages such as triple three-input AND devices provide this function directly.

Drafters use the wider gate rather than cascading two-input gates when the function is a single permissive with three conditions, such as guard closed, pressure healthy and mode selected. A single symbol keeps the logic readable and avoids implying an intermediate signal that does not exist.

The outline does not show whether an unused input is tied high when a three-input part is used for two signals. Unused inputs on the physical device need a defined level shown on the schematic.

How to read it

  • Count the input leads; a third input is easy to overlook where leads are closely spaced.
  • Check unused inputs are tied to a defined level.

Information to show or reference

  • Space the three inputs evenly along the flat side.
  • Label each permissive signal.
  • Show tie-offs for unused inputs on multi-input packages.

A distinction that matters

A two-input AND followed by another AND produces the same logic but implies an intermediate net.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

SNx4HC11 triple 3-input AND gates

Manufacturer documentation for triple three-input AND gates.

Texas Instruments · Public reference checked 28 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 28 October 2026

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