AND
AND gate
A logic element whose output is true when all stated positive-logic inputs are true.
Schematic
IEC · &
IEC AND gate (rectangular form)
Rectangular IEC-style AND element marked with an ampersand; the output is active only when every input is active.
In plain English
What does IEC AND gate (rectangular form) mean?
The IEC rectangular AND element is a plain box with the ampersand written near the top centre. Inputs enter on the left and the single output leaves on the right, so the function is identified by the additional drawing mark rather than by the outline shape. All inputs must stand at their internal 1 state for the output to take its internal 1 state.
A simple example
Rectangular gates are common on European interlock, burner-management and protection logic sheets because the same box can carry negation circles, polarity indicators and dependency labels without changing shape. A drafter can stack several & boxes in one column and the function remains readable even when the elements are abutted.
What the drawings help you do
The additional drawing mark says nothing about logic family, supply voltage, travel delay or whether the function is realised in hardware, relay contacts or PLC code. Those details come from the device schedule or the software reference attached to the sheet.
This particular reference
Rectangular IEC-style AND element marked with an ampersand; the output is active only when every input is active. The ≥1 OR element uses the same box; only the additional drawing mark differs, so a misread character changes the whole function.
- Normally open / normally closed
- The contact state in the normal condition defined for the drawing.
- Coil
- A wound conductor that can produce a magnetic field when energised.
- Signal
- Electrical information passed between devices, rather than necessarily the main power supply.
Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A) · SN74HC08 — AND gate logic
IEC · Rectangular outline with the & general qualifying symbol
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
Schematic · &
What it represents
The IEC rectangular AND element is a plain box with the ampersand written near the top centre. Inputs enter on the left and the single output leaves on the right, so the function is identified by the qualifier rather than by the outline shape. All inputs must stand at their internal 1 state for the output to take its internal 1 state.
Rectangular gates are common on European interlock, burner-management and protection logic sheets because the same box can carry negation circles, polarity indicators and dependency labels without changing shape. A drafter can stack several & boxes in one column and the function remains readable even when the elements are abutted.
The qualifier says nothing about logic family, supply voltage, propagation delay or whether the function is realised in hardware, relay contacts or PLC code. Those details come from the device schedule or the software reference attached to the sheet.
How to read it
- Read the & qualifier first; the box outline is identical for most IEC combinative elements.
- Check for negation circles or polarity triangles on inputs before writing the truth table.
Information to show or reference
- Show the & qualifier clearly inside the outline.
- Number each input when more than two are used.
- Reference the implementing device, PLC block or relay logic on the sheet.
A distinction that matters
The ≥1 OR element uses the same box; only the qualifier differs, so a misread character changes the whole function.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
Public explanation of the & general qualifying symbol and rectangular symbol composition.
SN74HC08 — AND gate logic
Manufacturer AND gate documentation showing the function implemented.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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