Symbols · DEC

Binary decoder / demultiplexer

Uses binary selection and enable conditions to activate the documented selected output.

Schematic · DECBinary decoder / demultiplexer: original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

Uses binary selection and enable conditions to activate the documented selected output.

On a schematic, identify the binary address inputs, enable polarities and output active level and trace the selected output channels and destination mapping. Keep the component tag and signal/reference names consistent across the control drawing, terminal schedule and device documentation.

A decoder and a demultiplexer can share a device implementation; this record combines those uses rather than counting the same hardware twice.

The preview is an independently drawn educational functional reference. Add the selected component’s actual power pins, terminal numbers, timing or analogue reference details when producing a construction drawing.

How to read it

  • Identify the binary address inputs, enable polarities and output active level.
  • Trace the selected output channels and destination mapping.

Information to show or reference

  • Label the binary address inputs, enable polarities and output active level.
  • Cross-reference the selected output channels and destination mapping.
  • Add the selected device or circuit documentation revision, power/reference connections and project signal convention.

A distinction that matters

A decoder and a demultiplexer can share a device implementation; this record combines those uses rather than counting the same hardware twice.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

SN74HC138 — binary decoding and demultiplexing

Public primary manufacturer documentation establishes the component function or circuit/topology relationship. Preview geometry and drafting explanations are independently authored.

Texas Instruments · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 14 October 2026

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