Symbols · I2C LVL

I2C voltage-level translator

In plain English

What does I2C voltage-level translator mean?

An I2C level translator adapts the specified logic-voltage levels between compatible bus sections.

A simple example

Two devices with different supported logic supplies may communicate through a suitable translator.

First logic-voltage domainI2C level translatorSecond logic-voltage domain
Original functional explanation. Arrows show information or energy roles; two-headed arrows identify two-way interfaces. This is not a pinout, certified standards graphic or complete circuit.

What the drawings help you do

Label the supply voltage domain on each side and show both I2C signals. Voltage translation lets compatible logic interfaces work across selected voltage levels; it does not automatically create a safety-rated isolation barrier. Follow the chosen translator’s requirements for pull-ups and power sequencing.

Voltage domain
A circuit section using a particular logic supply and reference.
Level translation
Adapting compatible signals between selected logic voltages.

Before using this reference

  • Identify both logic-supply domains.
  • Show clock/data connections and their selected pull-ups.
  • Reference supported voltage, bus and startup conditions.
Does voltage translation mean the two sides are isolated?

No. Changing logic-voltage levels is distinct from transferring information across an electrical isolation barrier. Use an explicitly specified isolating interface if that separation is required.

Read the source: I2C, I3C and SPI interface functions

Schematic · I2C LVLI2C voltage-level translator: original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

A distinction that matters

Voltage translation is different from electrical isolation across a rated barrier.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

I2C, I3C and SPI interface functions

I2C, I3C and SPI interface functions: public technical context for the named function. Product and compliance details remain with the publisher.

Texas Instruments · Public reference checked 27 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 27 October 2026

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