IEC logic negation at input
Small circle where an input meets an outline: an external 0 produces the internal 1 (active) state.
Circle on an output edge meaning the internal 1 state of the element produces an external 0.
In plain English
Output negation turns AND into NAND, OR into NOR and a buffer into an inverter. The circle sits where the output line meets the outline and states that the internal 1 state produces the external 0 state. As with input negation, a logic convention must be declared to relate this to voltage levels.
Drafters use output negation to avoid drawing separate inverters. When a negated output feeds a negated input on the next element, the two cancel, and reviewers often simplify the drawing by removing both.
The circle carries no information about output drive type or loading. Open-circuit or three-state behaviour needs its own additional drawing mark inside the outline.
Circle on an output edge meaning the internal 1 state of the element produces an external 0. An active-low output triangle states the level directly and is the data-book alternative.
Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
Output negation turns AND into NAND, OR into NOR and a buffer into an inverter. The circle sits where the output line meets the outline and states that the internal 1 state produces the external 0 state. As with input negation, a logic convention must be declared to relate this to voltage levels.
Drafters use output negation to avoid drawing separate inverters. When a negated output feeds a negated input on the next element, the two cancel, and reviewers often simplify the drawing by removing both.
The circle carries no information about output drive type or loading. Open-circuit or three-state behaviour needs its own qualifier inside the outline.
An active-low output triangle states the level directly and is the data-book alternative.
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
Defines logic negation at an output.
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
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