IEC · ≥1

IEC NOR gate (rectangular form)

IEC ≥1 element with a negated output; the output is active only when none of the inputs are active.

In plain English

What does IEC NOR gate (rectangular form) mean?

The IEC NOR element is drawn as the ≥1 OR box with a negation circle at the output. Its output is at the external 1 state only when every input is inactive, which makes it a natural way to show an all-healthy or all-clear permissive on a logic sheet.

A simple example

Interlock diagrams sometimes use the NOR element to produce a ready signal from a list of blocking conditions. The reader should check whether the blocking inputs are themselves negated, because a double negation can turn the function back into an AND of healthy signals.

Identify the device and formRead the connections and stateCheck the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

What the drawings help you do

As with all combinative IEC elements, the drawing says nothing about the response time or the electrical output stage. A NOR used in a safety function must also be traced to its implementing device to confirm the safety rating.

This particular reference

IEC ≥1 element with a negated output; the output is active only when none of the inputs are active. A ≥1 element without the output circle is a plain OR; the circle is the only difference.

Signal
Electrical information passed between devices, rather than necessarily the main power supply.
Rating
A value stating the conditions for which equipment is specified.
Schematic
A drawing showing function and connections rather than physical appearance.

Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A) · SN74HC02 — NOR gate logic

IEC · ≥1 rectangular element with output negation circle

Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.

Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.

Schematic · ≥1IEC NOR gate (rectangular form): original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

The IEC NOR element is drawn as the ≥1 OR box with a negation circle at the output. Its output is at the external 1 state only when every input is inactive, which makes it a natural way to show an all-healthy or all-clear permissive on a logic sheet.

Interlock diagrams sometimes use the NOR element to produce a ready signal from a list of blocking conditions. The reader should check whether the blocking inputs are themselves negated, because a double negation can turn the function back into an AND of healthy signals.

As with all combinative IEC elements, the drawing says nothing about the response time or the electrical output stage. A NOR used in a safety function must also be traced to its implementing device to confirm the safety rating.

How to read it

  • Count negations along the path; NOR with negated inputs is an AND of the uncomplemented signals.
  • Confirm which external level corresponds to the active state.

Information to show or reference

  • Place the negation mark at the output edge.
  • Label each blocking input.
  • Reference the implementing hardware or program block.

A distinction that matters

A ≥1 element without the output circle is a plain OR; the circle is the only difference.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)

Rectangular OR qualifier and output negation.

Texas Instruments · Public reference checked 28 October 2026 · Link only

SN74HC02 — NOR gate logic

Manufacturer NOR gate documentation.

Texas Instruments · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 28 October 2026

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