IEC pulse-triggered (master-slave) JK flip-flop
JK bistable whose outputs carry postponed marks: they change when the clock pulse ends, not at its start.
Angle mark beside an output showing it changes only when the initiating input returns to its original level.
In plain English
The postponed output additional drawing mark is a small right-angle mark inside the outline next to an output. It indicates that the output changes when the input that initiated the change, typically the C input, returns to its initial external state. It identifies pulse-triggered or master-slave flip-flops and data lock-out types.
This matters for timing analysis. On a pulse-triggered device the data must be stable for the whole time the clock is active, whereas on an edge-triggered device only setup and hold around the edge matter. The mark tells the reader which rule applies.
The additional drawing mark does not distinguish a pulse-triggered element from a data lock-out element; the clock input marking does. A dynamic mark on C with a postponed output indicates the data lock-out form.
Angle mark beside an output showing it changes only when the initiating input returns to its original level. An edge-triggered flip-flop has a dynamic C input and no postponed output mark.
Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
The postponed output qualifier is a small right-angle mark inside the outline next to an output. It indicates that the output changes when the input that initiated the change, typically the C input, returns to its initial external state. It identifies pulse-triggered or master-slave flip-flops and data lock-out types.
This matters for timing analysis. On a pulse-triggered device the data must be stable for the whole time the clock is active, whereas on an edge-triggered device only setup and hold around the edge matter. The mark tells the reader which rule applies.
The qualifier does not distinguish a pulse-triggered element from a data lock-out element; the clock input marking does. A dynamic mark on C with a postponed output indicates the data lock-out form.
An edge-triggered flip-flop has a dynamic C input and no postponed output mark.
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
Defines the postponed output qualifier and pulse-triggered element behaviour.
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
Elora Grid helps electrical teams work with drawings, specifications and equipment information. Explore the drafting workflow or join the early-access waitlist.