IEC · SRG8

IEC shift register (SRGm)

IEC register marked SRGm with m stages; the clock carries the shift arrow and moves data one place each cycle.

In plain English

What does IEC shift register (SRGm) mean?

SRGm identifies a shift register of m bits. The clock input is labelled with C1 and a shift arrow, showing that each active edge moves data one place. The serial input is labelled 1D, and the parallel outputs are listed down the right side, typically in a column of per-bit elements under a common-control block.

A simple example

On drawings, shift registers expand outputs for indicators or relay drivers, or capture serial data from a sensor. The reader should identify the shift direction, the serial input, and any output latch or enable, as these decide how and when outputs update.

Identify the device and formRead the connections and stateCheck the equipment reference
A guide to reading this reference. The original symbol illustration and its drawing notes appear below; these boxes are not a wiring diagram.

What the drawings help you do

The symbol does not show the data rate or the serial protocol. Those come from the controller documentation driving the register.

This particular reference

IEC register marked SRGm with m stages; the clock carries the shift arrow and moves data one place each cycle. A latched shift register adds a storage register and its own clock between the shift stages and the outputs.

Coil
A wound conductor that can produce a magnetic field when energised.
Signal
Electrical information passed between devices, rather than necessarily the main power supply.
Schematic
A drawing showing function and connections rather than physical appearance.

Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A) · SN74HC164 — serial-in parallel-out shift storage

IEC · Rectangular element with SRGm qualifier and a shift-right clock

Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.

Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.

Schematic · SRG8IEC shift register (SRGm): original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

SRGm identifies a shift register of m bits. The clock input is labelled with C1 and a shift arrow, showing that each active edge moves data one place. The serial input is labelled 1D, and the parallel outputs are listed down the right side, typically in a column of per-bit elements under a common-control block.

On drawings, shift registers expand outputs for indicators or relay drivers, or capture serial data from a sensor. The reader should identify the shift direction, the serial input, and any output latch or enable, as these decide how and when outputs update.

The symbol does not show the data rate or the serial protocol. Those come from the controller documentation driving the register.

How to read it

  • Identify the shift direction from the arrow.
  • Check for an output latch that holds outputs during shifting.

Information to show or reference

  • State the bit count in the qualifier.
  • Label the serial input as 1D.
  • Show the output latch and enable if present.

A distinction that matters

A latched shift register adds a storage register and its own clock between the shift stages and the outputs.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)

Lists SRGm and shift right or left input labels.

Texas Instruments · Public reference checked 28 October 2026 · Link only

SN74HC164 — serial-in parallel-out shift storage

Serial-in parallel-out shift register documentation.

Texas Instruments · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 28 October 2026

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