Σ
IEC adder (Σ)
IEC element marked Σ that adds binary words P and Q with carry-in CI and carry-out CO.
IEC
IEC · P-Q
IEC subtracter (P-Q)
IEC arithmetic element marked P-Q that subtracts word Q from word P, with borrow handling.
In plain English
What does IEC subtracter (P-Q) mean?
The subtracter additional drawing mark is written P minus Q. Inputs are grouped as the P and Q words with binary weights and outputs give the difference, with borrow input and output terminals for cascading. TI's overview lists it with the adder and other arithmetic qualifiers.
A simple example
Dedicated subtracter devices are uncommon; the function is often provided by an adder with an inverted input word or by an arithmetic logic unit. Functional diagrams and programmable logic documentation still use the P-Q element to state intent clearly.
What the drawings help you do
The symbol does not say whether the result is signed or how negative results are represented. State that in the logic description.
This particular reference
IEC arithmetic element marked P-Q that subtracts word Q from word P, with borrow handling. The Σ adder adds P and Q; an ALU may perform either under mode control.
- Terminal
- An identified point where a conductor connects.
- Signal
- Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic
- A drawing showing function and connections rather than physical appearance.
Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
IEC · Rectangular element with the P-Q qualifier
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
Schematic · P-Q
What it represents
The subtracter qualifier is written P minus Q. Inputs are grouped as the P and Q words with binary weights and outputs give the difference, with borrow input and output terminals for cascading. TI's overview lists it with the adder and other arithmetic qualifiers.
Dedicated subtracter devices are uncommon; the function is often provided by an adder with an inverted input word or by an arithmetic logic unit. Functional diagrams and programmable logic documentation still use the P-Q element to state intent clearly.
The symbol does not say whether the result is signed or how negative results are represented. State that in the logic description.
How to read it
- P is the minuend and Q the subtrahend.
- Check borrow terminals when cascading.
Information to show or reference
- Mark the element P-Q.
- Group and weight both words.
- Describe the result representation.
A distinction that matters
The Σ adder adds P and Q; an ALU may perform either under mode control.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
Lists P-Q as the subtracter qualifier.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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