XOR
Exclusive-OR gate
For two positive-logic inputs, produces a true output when the input states differ.
Schematic
Symbols · ADD
Binary full adder
Adds binary input words with the documented carry-in and produces sum and carry outputs.
Schematic · ADD
What it represents
Adds binary input words with the documented carry-in and produces sum and carry outputs.
On a schematic, identify the input word buses, bit order and carry-in and trace the sum word and carry-out/cascade connection. Keep the component tag and signal/reference names consistent across the control drawing, terminal schedule and device documentation.
A full adder performs arithmetic; an OR gate cannot replace its sum/carry relationships.
The preview is an independently drawn educational functional reference. Add the selected component’s actual power pins, terminal numbers, timing or analogue reference details when producing a construction drawing.
How to read it
- Identify the input word buses, bit order and carry-in.
- Trace the sum word and carry-out/cascade connection.
Information to show or reference
- Label the input word buses, bit order and carry-in.
- Cross-reference the sum word and carry-out/cascade connection.
- Add the selected device or circuit documentation revision, power/reference connections and project signal convention.
A distinction that matters
A full adder performs arithmetic; an OR gate cannot replace its sum/carry relationships.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
CD74HC283 — binary full adders
Public primary manufacturer documentation establishes the component function or circuit/topology relationship. Preview geometry and drafting explanations are independently authored.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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