Symbols · NPN-DAR

NPN Darlington transistor

Two NPN transistor stages connected as a Darlington pair to provide a combined current-amplifying device.

Schematic · NPN-DARNPN Darlington transistor: original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

Two NPN transistor stages connected as a Darlington pair to provide a combined current-amplifying device.

On a schematic, identify the common collector, input base and output emitter and trace the load and base-drive circuit. Keep the component tag and signal/reference names consistent across the control drawing, terminal schedule and device documentation.

A Darlington is a compound connection rather than a single ordinary NPN transistor; its voltage drops and switching behaviour require the device data.

The preview is an independently drawn educational functional reference. Add the selected component’s actual power pins, terminal numbers, timing or analogue reference details when producing a construction drawing.

How to read it

  • Identify the common collector, input base and output emitter.
  • Trace the load and base-drive circuit.

Information to show or reference

  • Label the common collector, input base and output emitter.
  • Cross-reference the load and base-drive circuit.
  • Add the selected device or circuit documentation revision, power/reference connections and project signal convention.

A distinction that matters

A Darlington is a compound connection rather than a single ordinary NPN transistor; its voltage drops and switching behaviour require the device data.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

TIP120/TIP125 complementary Darlington transistor documentation

Public primary manufacturer documentation establishes the component function or circuit/topology relationship. Preview geometry and drafting explanations are independently authored.

STMicroelectronics · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 14 October 2026

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