NOR
NOR gate
A logic gate that inverts an inclusive-OR result.
Schematic
IEEE / ANSI · NOR
ANSI NOR gate drawn as negative-input AND
AND outline with bubbled inputs, the De Morgan form of a NOR that reads as all inputs low gives a high output.
In plain English
What does ANSI NOR gate drawn as negative-input AND mean?
A NOR gate is equivalent to an AND gate with inverted inputs. Drawing the AND outline with input bubbles states the design intent directly: the output is high only when all inputs are low. It is the same device as a NOR gate with the outline chosen to match the signal sense.
A simple example
This representation is common for all-clear logic where each input is an active-high fault, so all-low means healthy. It also helps when reviewing permissive chains, because the outline reads as a conjunction of conditions.
What the drawings help you do
As with any De Morgan form, the part fitted is still a NOR device. The parts list, pin numbering and gate section remain those of the NOR package.
This particular reference
AND outline with bubbled inputs, the De Morgan form of a NOR that reads as all inputs low gives a high output. An AND outline with only an output bubble is a NAND; here the bubbles are on the inputs.
- Signal
- Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic
- A drawing showing function and connections rather than physical appearance.
Read the source: SN74HC02 — NOR gate logic · Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
IEEE / ANSI · AND outline with input bubbles (De Morgan equivalent of NOR)
Distinctive-shape form as used in IEEE/ANSI-style schematics and manufacturer data books. Independent educational drawing; exact standard geometry and compliance are not asserted. The counterpart is the matching functional concept; no equivalence of every detailed standard graphic is asserted.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
Schematic · NOR
What it represents
A NOR gate is equivalent to an AND gate with inverted inputs. Drawing the AND outline with input bubbles states the design intent directly: the output is high only when all inputs are low. It is the same device as a NOR gate with the outline chosen to match the signal sense.
This representation is common for all-clear logic where each input is an active-high fault, so all-low means healthy. It also helps when reviewing permissive chains, because the outline reads as a conjunction of conditions.
As with any De Morgan form, the part fitted is still a NOR device. The parts list, pin numbering and gate section remain those of the NOR package.
How to read it
- Read bubbled inputs on an AND outline as a NOR device.
- Confirm the part reference matches a NOR package.
Information to show or reference
- Use the form consistently for active-low or all-clear logic.
- Keep the NOR device reference.
- Document the De Morgan convention in the legend.
A distinction that matters
An AND outline with only an output bubble is a NAND; here the bubbles are on the inputs.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
SN74HC02 — NOR gate logic
Manufacturer NOR gate documentation for the implementing device.
Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
Negation at inputs.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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