ROM
IEC read-only memory (ROM)
IEC element marked ROM with grouped address inputs and data outputs that read the addressed word.
IEC
IEC · RAM
IEC random-access memory (RAM)
IEC element marked RAM with address grouping, a write control input and A-labelled data inputs and outputs.
In plain English
What does IEC random-access memory (RAM) mean?
A RAM symbol carries the RAM additional drawing mark and organisation. Address inputs form an A group; a write input is labelled with control dependency, and data inputs are labelled A plus the control number and D, meaning data is written to the addressed word when the control is active. Data outputs are labelled A.
A simple example
TI's overview builds a 16-word by 4-bit memory from latches to explain this notation. On drawings, RAM symbols document buffers in communication modules and processor boards.
What the drawings help you do
The symbol does not state whether the memory is static or dynamic, its retention behaviour, or any battery backup. Note those where data must survive power loss.
This particular reference
IEC element marked RAM with address grouping, a write control input and A-labelled data inputs and outputs. ROM has no write inputs; FIFO memory has no address inputs.
- Signal
- Electrical information passed between devices, rather than necessarily the main power supply.
- Schematic
- A drawing showing function and connections rather than physical appearance.
Read the source: Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
IEC · Rectangular element with RAM qualifier, address grouping, write control and A-dependent data
Qualifying-symbol and dependency conventions as explained in TI's public overview of IEEE Std 91-1984, which incorporates IEC 617-12 work. Independent educational drawing; not certified IEC geometry or an IEC database identifier.
Shown as an independently authored educational illustration. Use the cited publication and drawing legend to verify the required drafting form.
Schematic · RAM
What it represents
A RAM symbol carries the RAM qualifier and organisation. Address inputs form an A group; a write input is labelled with control dependency, and data inputs are labelled A plus the control number and D, meaning data is written to the addressed word when the control is active. Data outputs are labelled A.
TI's overview builds a 16-word by 4-bit memory from latches to explain this notation. On drawings, RAM symbols document buffers in communication modules and processor boards.
The symbol does not state whether the memory is static or dynamic, its retention behaviour, or any battery backup. Note those where data must survive power loss.
How to read it
- Write control appears as a C input; data inputs carry A and the control number.
- Check for three-state outputs.
Information to show or reference
- State the organisation.
- Show write and enable controls with dependency labels.
- Note retention or backup arrangements.
A distinction that matters
ROM has no write inputs; FIFO memory has no address inputs.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
Overview of IEEE Standard 91-1984: explanation of logic symbols (SDYZ001A)
RAM qualifier and the memory array example using A dependency.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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