Symbols · XOR

Exclusive-OR gate

For two positive-logic inputs, produces a true output when the input states differ.

Schematic · XORExclusive-OR gate: original educational illustration
Original educational illustrationNot to scale · See source and graphic notes

What it represents

For two positive-logic inputs, produces a true output when the input states differ.

On a schematic, identify the two compared digital states and trace the inequality output and its control or monitoring use. Keep the component tag and signal/reference names consistent across the control drawing, terminal schedule and device documentation.

Two-input XOR is not inclusive OR; for more inputs verify whether the device implements odd parity or another specified function.

Terminal letters describe electrical roles, not package pin numbers. Check the selected public datasheet for the actual pin assignment, polarity and any internally connected terminals before completing the drawing.

How to read it

  • Identify the two compared digital states.
  • Trace the inequality output and its control or monitoring use.

Information to show or reference

  • Label the two compared digital states.
  • Cross-reference the inequality output and its control or monitoring use.
  • Add the selected device or circuit documentation revision, power/reference connections and project signal convention.

A distinction that matters

Two-input XOR is not inclusive OR; for more inputs verify whether the device implements odd parity or another specified function.

Sources you can follow

These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.

SN74HC86 — XOR gate logic

Public primary manufacturer documentation establishes the component function or circuit/topology relationship. Preview geometry and drafting explanations are independently authored.

Texas Instruments · Public reference checked 14 October 2026 · Link only

About this graphic

This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.

SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.

Entry JSON · Entry Markdown · Last editorial update: 14 October 2026

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