3STATE
Three-state logic buffer
A digital output stage that can drive logical states or enter its documented high-impedance state.
Schematic
Symbols · BUF
Non-inverting logic buffer
Transfers a digital state through a non-inverting logic output stage.
Schematic · BUF
What it represents
Transfers a digital state through a non-inverting logic output stage.
On a schematic, identify the input voltage domain, supply and output loading and trace the driven logic line and receiving inputs. Keep the component tag and signal/reference names consistent across the control drawing, terminal schedule and device documentation.
A buffer can provide drive capability without inversion; it is not a galvanic isolation barrier.
Terminal letters describe electrical roles, not package pin numbers. Check the selected public datasheet for the actual pin assignment, polarity and any internally connected terminals before completing the drawing.
How to read it
- Identify the input voltage domain, supply and output loading.
- Trace the driven logic line and receiving inputs.
Information to show or reference
- Label the input voltage domain, supply and output loading.
- Cross-reference the driven logic line and receiving inputs.
- Add the selected device or circuit documentation revision, power/reference connections and project signal convention.
A distinction that matters
A buffer can provide drive capability without inversion; it is not a galvanic isolation barrier.
Sources you can follow
These public references support the explanation and provide further detail. Their graphics and downloadable files remain with their publishers.
SN74LS07 — open-collector output buffers
Public primary manufacturer documentation establishes the component function or circuit/topology relationship. Preview geometry and drafting explanations are independently authored.
About this graphic
This illustration was authored independently by Elora Grid to explain the concept. It is not reproduced from a customer drawing, an official standard graphic or a manufacturer CAD file. Its correspondence to an exact IEC or IEEE symbol identifier has not been certified.
SVG and DXF downloads contain this original artwork. DXF uses unscaled drawing units; a GA envelope supplies no product dimensions, clearances or fabrication information. Original artwork is available under CC BY 4.0. Third-party references retain their own terms.
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